| SIMATIC S7-400, CPU 416-2 1.6 MB WORKING MEMORY (0.8 MB CODE, 0.8 MB DATA) 1. INTERFACE MPI/DP 12 MBIT/S 2. INTERFACE DP |
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| CiR - Configuration in RUN |
| CiR synchronization time, basic load | 100 ms |
| CiR synchronization time, time per I/O slave | 120 µs |
| Supply voltage |
| 24 V DC | Yes |
| Input current |
| from backplane bus 5 V DC, typ. | 1.5 A |
| from backplane bus 5 V DC, max. | 1.6 A |
| from backplane bus 24 V DC, max. | 300 mA; Total current consumption of the components connected to the MPI/DP interfaces, but no more than 150 mA per interface |
| Power losses |
| Power loss, typ. | 7.5 W |
| Backup battery |
| Battery operation | |
| Backup current, typ. | 40 µA |
| Backup current, max. | 420 µA |
| Feeding of external backup voltage to CPU | 5 to 15 VDC |
| Memory |
| Data and program memory |
| Data memory, max. | 800 kbyte |
| Program memory, max. | 800 kbyte |
| Work memory |
| integrated | 1600 kbyte |
| expandable | No |
| Load memory |
| expandable FEPROM | Yes; with Memory Card (FLASH) |
| expandable FEPROM, max. | 64 Mbyte |
| integrated RAM, max. | 256 kbyte |
| expandable RAM | Yes; with Memory Card (RAM) |
| expandable RAM, max. | 64 Mbyte |
| Backup |
| present | Yes |
| with battery | Yes; all data |
| without battery | No |
| CPU processing times |
| for bit operations, min. | 0.08 µs |
| for word operations, min. | 0.08 µs |
| for fixed point arithmetic, min. | 0.08 µs |
| for floating point arithmetic, min. | 0.48 µs |
| CPU-blocks |
| DB |
| Number, max. | 4095; DB 0 reserved |
| Size, max. | 64 kbyte |
| FB |
| Number, max. | 2048 |
| Size, max. | 64 kbyte |
| FC |
| Number, max. | 2048 |
| Size, max. | 64 kbyte |
| OB |
| Number, max. | see instruction list |
| Size, max. | 64 kbyte |
| Number of time alarm OBs | 8 |
| Number of delay alarm OBs | 4 |
| Number of time interrupt OBs | 9 |
| Number of process alarm OBs | 8 |
| Nesting depth |
| per priority class | 24 |
| additional within an error OB | 2 |
| Counters, timers and their retentivity |
| S7 counter |
| Number | 512 |
| Retentivity |
| adjustable | Yes |
| lower limit | 0 |
| upper limit | 2047 |
| preset | Z 0 to Z 7 |
| Counting range |
| lower limit | 1 |
| upper limit | 999 |
| IEC counter |
| present | Yes |
| Type | SFB |
| S7 times |
| Number | 512 |
| Retentivity |
| adjustable | Yes |
| lower limit | 0 |
| upper limit | 511 |
| preset | No retentivity |
| Time range |
| lower limit | 10 ms |
| upper limit | 9990 s |
| IEC timer |
| present | Yes |
| Type | SFB |
| Data areas and their retentivity |
| retentive data area, total | Total working and load memory (with backup battery) |
| Flag |
| Number, max. | 16 kbyte |
| Retentivity available | Yes; MB 0 to MB 16383 |
| Retentivity preset | MB 0 to MB 15 |
| Number of clock memories | 8; 1 memory byte |
| Data blocks |
| Number, max. | 4096; DB 0 reserved |
| Size, max. | 64 kbyte |
| Address area |
| I/O address area |
| Inputs | 16 kbyte |
| Outputs | 16 kbyte |
| of which, distributed |
| MPI/DP interface, inputs | 2 kbyte |
| MPI/DP interface, outputs | 2 kbyte |
| DP interface, inputs | 8 kbyte |
| DP interface, outputs | 8 kbyte |
| Process image |
| Inputs, adjustable | 16 kbyte; adjustable at the expense of the code area of the RAM |
| Outputs, adjustable | 16 kbyte; adjustable at the expense of the code area of the RAM |
| Inputs, default | 512 byte |
| Outputs, default | 512 byte |
| consistent data, max. | 244 byte |
| Access to consistent data in process image | Yes |
| Subprocess images |
| Number of subprocess images, max. | 8 |
| Digital channels |
| Inputs | 131072 |
| Outputs | 131072 |
| Inputs, of which central | 131072 |
| Outputs, of which central | 131072 |
| Analog channels |
| Inputs | 8192 |
| Outputs | 8192 |
| Inputs, of which central | 8192 |
Out
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